Surface depletion thickness of p-doped silicon nanowires grown using metal-catalysed chemical vapour deposition

An accurate evaluation of the radial dopant profile in a nanowire is crucial for designing future nanoscale devices synthesized using bottom-up techniques. We developed a very slow wet chemical etchant for gradually reducing the diameters of metal-catalysed, boron-doped silicon nanowires with varying diameters and lengths. Particular care has been taken to perform the experiment at room temperature to prevent dopant segregation, which is common in high temperature processes. By ensuring identical surface conditions subsequent to diameter reduction, the resistance of the nanowires was measured and, as anticipated, was found to increase with decreasing diameter. As the diameters were shrunk using wet-chemical etching, nanowires exhibited a non-linear increase of the resistance when the diameter was reduced to ∼50 nm. This is an indication of near-complete depletion in the nanowires caused by nanowire surface charges. The dopant concentration of the nanowires was found to be 2.1 × 1018 cm−3 and the corresponding surface charge density was around 2.6 × 1012 cm−2. (Some figures in this article are in colour only in the electronic version) Semiconductor and metallic nanostructures have gained tremendous attention because of their possible applications in photonics, sensing, and further miniaturization of electronic devices [1–6]. With their high surface to volume ratio, nanowires are used for sensing biological and chemical agents in solutions and atmosphere [7–11]. Silicon nanodevices are especially good candidates for biological applications due to easy fabrication and being friendly to living organisms [12]. Surface properties of the nanowires play a very important role in the electrical properties of devices such as field-effect sensors or transistors. The variation of either the resistance or capacitance of the sensor is measured; both properties are directly related to the surface charges. Therefore, it is important to know the surface charges and the resulting depletion layer thickness of field effect devices, such as MOSFETs and sensors for optimal operation. Although surface potential and the depletion layer thickness of wafers can be measured by surface voltage characterization techniques such as Kelvin probe measurements [13], these techniques are very hard or impossible to use in nanowires because of their small size and cylindrical shape. Electrical and optical properties of nanowires are usually measured by making contacts to nanowires placed on an insulating substrate, which is usually an oxidized silicon wafer. However, for an accurate measurement of conductivity, the nanowires need to be free from contact with any object and to be surrounded by nonconductive material to eliminate possible artifacts due to current paths other than those through the nanowire itself [9]. In this work, we used our previously reported method of growing suspended nanowires between 0957-4484/06/110240+06$30.00 © 2006 IOP Publishing Ltd Printed in the UK S240 Surface depletion thickness of p-doped silicon nanowires grown using metal-catalysed chemical vapour deposition P+ Silicon Electrode P+ Silicon Electrode un-bridged nanowire bridged nanowire secondary nucleation 2 μm (a) Silicon Wafer Silicon dioxide layer p+ Silicon electrode p+ Silicon electrode Silicon nanowire